1. Field of the Invention
The present invention relates to a method for manufacturing a flat panel display and, more particularly, to a method for manufacturing a flat panel display using fewer masks in comparison to a conventional method.
2. Description of Related Art
Currently, a thin film transistor liquid crystal display (TFT-LCD) is manufactured by employing five mask steps to form a gate metal layer, a semiconductor layer, a source/drain metal layer, contact holes and pixel electrodes, respectively. Herein, the contact holes function as holes in a dielectric layer to allow the electrical connection between the source/drain metal layer and the pixel electrodes.
FIGS. 1A to 1H show a conventional process for manufacturing a liquid crystal display. With reference to FIG. 1A, there is shown a conventional process for manufacturing contact holes (not shown in FIG. 1A) by a fourth mask. A display substrate 1 is first manufactured by employing several mask steps. Herein, a pattern of a source/drain metal layer 14 is formed on a glass substrate 11 by a third mask (not shown in FIG. 1A), and then a dielectric layer 15 is formed on the surface of the glass substrate 11 to protect the circuit structure there below. Subsequently, a photoresist layer 16 is coated on the dielectric layer 15. The photoresist layer 16 is a positive photoresist that can be removed by a developer after the absorption of light energy. After the display substrate 1 is accomplished, the display substrate 1 undergoes an exposure process by a light source 3 and a fourth mask 2. The aforementioned fourth mask 2 comprises a transparent quartz substrate 21 and a chromium film 22 disposed on the transparent quartz substrate 21. The region not covered by the chromium film 22 defines the patterns of the contact holes. When the light source 3 is shone on the fourth mask 2, part of available light cannot pass through the region covered by the chromium film 22 but can pass the region not covered by the chromium film 22. Thereby, the light is not shone on the A region of the photoresist layer 16 corresponding to the region covered by the chromium film 22 of the fourth mask 2 but is shone on the B region of the photoresist layer 16 corresponding to the region not covered by the chromium film 22 of the fourth mask 2.
With reference to FIG. 1B, there is shown a display substrate 1 after completion of the aforementioned exposure process and then a soaking process is carried out in a developer (not shown in FIG. 1B). As shown in FIG. 1B, the developer removes only the B region of the photoresist layer 16 and the A region of the photoresist layer 16 is retained.
With reference to FIG. 1C, there is shown a display substrate 1 after completion of the aforementioned development process and then a soaking process is carried out in an etching liquid (not shown in FIG. 1C) for a period of time to form contact holes 151 and 152. The part of the dielectric layer 15 covered by the photoresist layer 16 (i.e. the A region of the dielectric layer 15) is protected from being etched. Thereby, only the B region of the dielectric layer 15 and/or the insulating layer 13 is removed by the etching liquid so as to expose the source/drain metal layer 14 and the gate metal layer 12.
With reference to FIG. 1D, there is shown a display substrate 1 after completion of the aforementioned etching process and then a process is carried out for removing the photoresist layer 16 shown in FIG. 1C.
With reference to FIG. 1E, there is shown a conventional process for manufacturing pixel electrodes by utilizing a fifth mask. After the photoresist layer 16 is removed, a pixel electrode layer 17 is formed on the display substrate 1 by physical vapor deposition. Generally, the material of the pixel electrode layer 17 is indium titanium oxide (ITO). Hereafter, a photoresist layer 18 is formed by coating. Herein, the pixel electrode layer 17 electrically connects to the source/drain metal layer 14 and the gate metal layer 12 directly. The following exposure process is similar to that shown in FIG. 1A, except that the mask shown in FIG. 1E is a fifth mask 4, the pattern of the chromium film 42 on the transparent quartz substrate 41 defines the patterns of the pixel electrodes, and the D region of the photoresist layer 18 corresponding to the region not covered by the chromium film 42 can absorb light energy.
With reference to FIG. 1F, there is shown a display substrate 1 after completion of the exposure process by the fifth mask and then a soaking process is carried out in a developer (not shown in FIG. 1F). As shown in FIG. 1F, the developer removes only the D region of the photoresist layer 18 and the C region of the photoresist layer 18 is retained.
With reference to FIG. 1G, there is shown a display substrate 1 after completion of the aforementioned exposure process shown in FIG. F and then a soaking process is carried out in an etching liquid (not shown in FIG. 1G) for a period of time. As shown in FIG. 1G, the D region of the pixel electrode layer 17 is removed.
With reference to FIG. 1H, there is shown a display substrate 1 after completion of the etching process shown in FIG. 1G and then a process is carried out for thoroughly removing the photoresist layer 18 shown in FIG. 1G. So far, the conventional process can accomplish the manufacture of the contact holes 151, 152 and the pixel electrodes 171, 172.
However, the increase in the size of a liquid crystal device results in the corresponding rise of the cost involved in the masks. If a liquid crystal display is manufactured by a conventional method, the cost incurred in the masks cannot be reduced due to the requirement of five masks and thus the manufacturing cost of the liquid crystal display is high. Thereby, the manufacturing time and cost can be reduced by lessening the number of masks used in the process for manufacturing a liquid crystal display.